1. Field of the Invention
The present invention is related to current-switched digital to analog converters.
2. Background Art
An analog section of digital-to-analog converters (DACs) usually receives complementary drive signals that are generated using a switch driver circuit. The switch driver circuit receives digital signals and generates the drive signals therefrom. The analog section uses the received drive signals to generate analog signals representative of the digital signals.
Ideally, the drive signals have rise and fall times that are substantially equal (e.g., a rise time of a first drive signal is substantially equal to a fall time of a second drive signal, and vice versa). This is because matching of the rise and fall times of the drive signals is critical to linearity performance of the DAC circuit, especially when a high speed sampling clock is required. Therefore, mismatches of the rise and fall times of the drive signals should be kept as small as possible. However, conflicts between elements in the switch driver circuit typically result in some mismatch between rise and fall times of the drive signals, which often results in a mismatch that is above threshold level.
Therefore, what is needed is a system and method that generate drive signals having rise and fall times that are substantially equal.
Embodiments of the present invention provide a system including a digital section and an analog section. For example, the system can be a one or more bit current-switched digital-to-analog converter (DAC), or the like. The digital section includes first and second driving devices. The first driving device has a switch and a logic gate. The first driving device is configured to receive a first digital signal and generate a first drive signal therefrom. The second driving device has a switch and a logic gate. The second driving device is configured to receive a second digital signal and generate a second drive signal therefrom. The rise and fall times of the first and second drive signals are substantially equal. The analog signal section is configured to receive the first and second drive signals and generate first and second respective analog signals therefrom.
Other embodiments of the present invention provide a system including a digital section and an analog section. The digital section is configured to receive digital signals and includes a system for generating first and second drive signals having substantially equal rise and fall times therefrom. The analog section is configured to receive the first and second drive signals and generate first and second analog signals therefrom.
Further embodiments, features, and advantages of the present inventions, as well as the structure and operation of the various embodiments of the present invention, are described in detail below with reference to the accompanying drawings.